[EC-702] MICROELECTRONICS AND VLSI DESIGN [2013-14]

This Paper is currently included in the syllabus of Electronics and Communication Engineering(ECE) in seventh sem(4th year-First sem).

CS/B.TECH/(ECE-New)/SEM-7/EC-702/2013-14

2013

MICROELECTRONICS & VLSI DESIGN

Time Allotted : 3 Hours                                    Full Marks : 70

The figures in the margin indicate full marks.

Candidates are required to give their answers in their own words

as far as practicable.

GROUP – A

(Multiple Choice Type Question)

1.       Choose the correct alternatives for any ten of the following:
                                                                                               10 x 1 = 10

          i)        Noise margin for low voltage is defined as

                   a)       NML=VIL-VOL                 b)       NML=VIL-VIH

                   c)       NML=VOH-VOL                d)       NML=VIH-VIL

          ii)       In the VTC curve of an inverter, critical voltages are obtained where the shape of the curve (d  Voutd  Vin)  is

                   a)       1                                    b)       -1

                   c)       0                                    d)       none of these.

          iii)      Slant in (ID-VDS) occurs due to

                   a)       body effect

                   b)       velocity saturation

                   c)       channel length modulation

                   d)       mobility degradation

          iv)      The unit of μnCOX is

                   a)       A/V2                          b)       V-1

                   c)       ohm                               d)       (ohm)-1